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Freehdl

May 26, 2018

Free VHDL simulator

The goals of the FreeHDL project are to develop a VHDL simulator that has a graphical waveform viewer and a source level debugger. It also aims at VHDL-93 compliancy. The project is at a very early development stage.

WWW http//www.freehdl.seul.org/