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P5-tie-cache
Jul 20, 2023
LRU Cache in Memory through a tie interface
From README This module implements a least recently used LRU cache in memory through a tie interface. Any time data is stored in the tied hash, that key/value pair has an entry time associated with it, and as the cache fills up, those members of the cache that are the oldest are removed to make room for new entries.
So, the cache only "remembers" the last written entries, up to the size
of the cache. This can be especially useful if you access great amounts
of data, but only access a minority of the data a majority of the time.
The implementation is a hash, for quick lookups, overlaying a doubly
linked list for quick insertion and deletion. On a WinNT PII 300, writes
to the hash were done at a rate 3100 per second, and reads from the hash
at 6300 per second. Work has been done to optimize refreshing cache
entries that are frequently read from, code like $cacheentry, which
moves the entry to the end of the linked list internally.
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