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Symfpu

Jul 20, 2023

Implementation of IEEE-754 / SMT-LIB floating-point

SymFPU is an implementation of the SMT-LIB / IEEE-754 operations in terms of bit-vector operations. It is templated in terms of the bit-vectors, propositions, floating-point formats and rounding mode types used. This allow the same code to be executed as an arbitrary precision “SoftFloat” library although it’s performance would not be good or to be used to build symbolic representation of floating-point operations suitable for use in “bit-blasting” SMT solvers you could also generate circuits from them but again, performance will likely not be good.

Checkout these related ports:
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  • Zimpl - Language to translate the LP models into .lp or .mps
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  • Zarray - Dynamically typed N-D expression system based on xtensor
  • Z3 - Z3 Theorem Prover
  • Yices - SMT solver
  • Yacas - Yet Another Computer Algebra System
  • Xtensor - Multi-dimensional arrays with broadcasting and lazy computing
  • Xtensor-python - Python bindings for xtensor
  • Xtensor-io - Xtensor plugin to read/write images, audio files, numpy npz and HDF5
  • Xtensor-blas - BLAS extension to xtensor
  • Xspread - Spreadsheet program for X and terminals
  • Xppaut - Graphical tool for solving differential equations, etc
  • Xplot - X11 plotting package
  • Xlife++ - XLiFE++ eXtended Library of Finite Elements in C++