RECENT POSTS
- Introduction to FreeBSD Security Best Practices
- Working with Package Management in FreeBSD
- Understanding FreeBSD Security Advisories and Updates
- Troubleshooting Common System Administration Issues in FreeBSD
- Tips for Hardening FreeBSD to achieve System Protection
- Setting Up DHCP Server in FreeBSD
- Secure User and Group Management in FreeBSD Systems
- Secure Remote Access with SSH in FreeBSD
- Optimizing System Performance in FreeBSD
- Network Packet Capture with tcpdump in FreeBSD
- All posts ...
Do you have GDPR compliance issues ?
Check out Legiscope a GDPR compliance software, that will save you weeks of work, automating your documentation, the training of your teams and all processes you need to keep your organisation compliant with privacy regulations
Klayout
Jul 20, 2023
Qt-based chip mask layout viewing and editing tool
KLayout is a viewing and editing tool for GDS and OASIS files. It supports parametrized cells, and Ruby or Python-based scripting environment to automate various tasks of the chip design engineers.
- Older
- Newer
Checkout these related ports:
- Zcad - Simple CAD program
- Z88 - Compact Finite Element Analysis System
- Yosys - Yosys Open SYnthesis Suite
- Yosys-systemverilog - SystemVerilog support for Yosys
- Xyce - Xyce electronic simulator
- Xcircuit - X11 circuit schematics drawing program
- Veryl - Veryl A modern Hardware Description Language (HDL)
- Veroroute - PCB (printed circuit board) design software
- Verilog-mode.el - Emacs lisp modules for the Verilog language
- Verilator - Synthesizable Verilog to C++ compiler
- Uranium - Python framework for 3D printing applications
- Uhdm - Universal Hardware Data Model
- Tochnog - Free explicit/implicit Finite Element Program
- Tkgate - Event driven digital circuit simulator
- Sweethome3d - Free interior 3D design application